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MAX-3D -
World's First True 3D-aware Layout Editor

Now OpenAccess Compliant
Call for Details
408 414 - 7647 x202

Through-Silicon Via Wafer Stacking Promises Faster and Denser Integrated Circuits

IC Designers can now build 3D stack chips with MAX-3D.

MAX-3D can combine distinct process wafers, and allows the designer to view, edit and connect the independent wafers into one 3D stack chip.

This design technique – known as “Through-Si Via Wafer Stacking” – is a new dimension for chip designs. It allows distinct wafers to be stacked on each other, and connected internally. This results in chips with denser designs and higher performance.

For example, a processor design in a 32 nm technology could be combined with a 65 nm memory and a 180 nm Analog device – on the same 3D chip. Furthermore, no changes need to be made to the foundry-supplied PDKs to incorporate these technologies in MAX-3D.

MAX-3D Features:

  • Fastest and most powerful layout editor.
  • Interactive connectivity tracing through all layers and levels (wafers).
  • Fully heirarchial viewing and editing.
  • Continuous DRC with real-time feedback.
  • Direct interface to Calibre © and Calibre RVE © for faster DRC (copyright Mentor Graphics Corporation).
  • Interactive connectivity always available.
  • Hierarchical and incremental parasitic extraction.
  • Interactive wiring tool with flylines to show connections not yet completed
  • Generators for automated layout structures, ranging from simple transistors and gates to large structures such as complete SRAMs.

  • Full customization and extensions via Tcl/Tk and a full API.
    - Usable out of the box, or customize as you wish.
    - Write interfaces to all the other tools in your design flow.
  • Optimized for large databases.




Call 408-414-7647 x202 or
Email info@micromagic.com
for complete information

 
     
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 408.414.7647
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