MAX-3D -
World's First True 3D-aware Layout Editor

Through-Silicon Via Wafer Stacking Promises Faster and Denser Integrated Circuits

IC Designers can now build 3D stack chips with MAX-3D.

MAX-3D can combine distinct process wafers, and allows the designer to view, edit and connect the independent wafers into one 3D stack chip.

This design technique – known as “Through-Si Via Wafer Stacking” – is a new dimension for chip designs. It allows distinct wafers to be stacked on each other, and connected internally. This results in chips with denser designs and higher performance.

For example, a processor design in a 32 nm technology could be combined with a 65 nm memory and a 180 nm Analog device – on the same 3D chip. Furthermore, no changes need to be made to the foundry-supplied PDKs to incorporate these technologies in MAX-3D.