Press Release –

New Product Announcement

Micro Magic Announces MAX-3D – the World’s First True 3D Layout Editor 

Through-Silicon Via Wafer Stacking Promises Faster and Denser Integrated Circuits 

September 27, 2007   Embargoed until October 8, 2007 


MMI Logo 
 
MAX-3D is the world’s first true 3D aware layout editor.

MAX-3D can combine distinct process wafers, and allows the designer to view, edit and connect the independent wafers into one 3D stack chip.

This design technique – known as “Through-Si Via Wafer Stacking” – is a new dimension for chip designs. It allows distinct wafers to be stacked on each other, and connected internally (see diagram). This results in chips with denser designs and higher performance.

For example, a processor design in a 32 nm technology could be combined with a 65 nm memory and a 180 nm Analog device – on the same 3D chip. Furthermore, no changes need to be made to the foundry-supplied PDKs to incorporate these technologies in MAX-3D.

MAX-3D is the only commercial layout editor capable of Through-Si Via 3D design. It includes connectivity tracing, DRC checking and many other features found in Micro Magic’s production-proven MAX layout editor.

The product and its underlying technology have been in development for several years by one of the industry’s leading experts – Dr Lisa McIlrath – Micro Magic’s Chief Scientist. “I was impressed that MAX was able to provide the required speed and capacity required for these large complex 3D designs” stated Dr McIlrath.

Through-Si Via 3D wafer stack designs are an extreme challenge for design tools. Current large 2D designs can crash many of today’s layout editors. A 3D chip which connects several levels of 2D layouts multiplies the complexity of the design. MAX-3D has demonstrated its capacity by displaying and editing a design of 1.2 Trillion devices – in real time.

Like all Micro Magic products, MAX-3D is fully programmable and customizable, and integrates well with other EDA tools.

MAX-3D will be demonstrated at the RTI Ventures 3D Architectures for Semiconductor Integration and Packaging Conference to be held in Burlingame, CA October 22, 2007. Dr. McIlrath will be presenting a seminar on 3D integrated circuit design at the pre-conference symposium.

Robert Patti, CTO of Tezzaron Semiconductor and a leading expert in 3D chip design, will also present at the 3D Architectures conference. Mr Patti stated “MAX-3D is the world’s first true 3D layout editor. It can handle our biggest designs. It’s the fastest, easiest to use layout editor I’ve seen.”

MAX-3D is available for a 30 day trial to qualified IC design organizations. For more information, Call 408-414-7647 or visit 
http://www.micromagic.com/max-3d.html

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Thru-Si Via Wafer Stacking

This example shows that different technologies can be combined in one 3D chip.

In this case, a processor is combined with a memory and an analog device.

 

 

3 layers of different technologies with Vias
Actual screenshot of Micro Magic's MAX-3D Layout Editor.

 

Screenshot of MAX-3D with 3 different technologies

Example 3D Chip showing three wafer levels connected by through-Si vias.

Through-Si vias provide the highest level of performance.

 
About Micro Magic, Inc.

Micro Magic, Inc., provides tools, services, and intellectual property (IP) for the design of high-speed, low-power SoCs. The company’s mission is to help designers dramatically reduce the time and cost required to produce high-performance SoC designs. Micro Magic’s advanced EDA tools are built by IC designers for IC designers. They can handle any size design, are production-proven, and are easy to learn. The company’s products have been used to design the datapaths and memory subsystems associated with all types of SoCs, including processors, DSPs, embedded controllers, multi-media, network and graphics chips.

 
For further information:

Micro Magic, Inc. 
Sunnyvale, California 
www.MicroMagic.com

408-414-7647 ext. 202